1. Field of the Invention
The present invention relates to a method of patterning a resist used in the manufacture of a semiconductor integrated circuit.
2. Description of the Background Art
Advances in the technology of manufacturing semiconductor integrated circuits allow the circuits to become increasingly smaller. For further improvement in device performance, in recent years, it has become necessary to pattern a resist at a line size (width) of about 0.10 xcexcm and a space size (gap width between patterns) of about 0.30 xcexcm.
In conventional resist patterning methods, however, it was difficult to produce such a fine pattern.
A first aspect of the present invention is directed to a method of patterning a resist comprising the steps of: (a) forming a resist on an underlying layer; (b) selectively exposing the resist to form an exposed portion and an unexposed portion; and (c) after the step (b), performing development processing of the resist using a developing solution, wherein either of the exposed and unexposed portions defines a first region and the other defines a second region in which the velocity of dissolution with respect to the developing solution is lower than in the first region. The step (c) includes the steps of: (c-1) removing all the resist in the first region at a first velocity, and (c-2) after the step (c-1), continuing the development processing to remove the resist in the second region at a second velocity lower than the first velocity.
According to a second aspect of the present invention, the second region includes a plurality of third regions sectioned to the same size and shape by the first region, and there is at least a space of one third region between the plurality of third regions.
According to a third aspect of the present invention, each of the plurality of third regions is designed to form a slim wire.
The method of the first aspect allows further fine resist patterning, smaller in dimension than the exposed and unexposed portions which are distinguished by the selective exposure in step (b). Further, until the patterned resist is obtained, the resist is dissolved rapidly at the first velocity and then slowly at the second velocity. This allows a wide margin of time for fine patterning in the second region.
The method of the second aspect allows a wide margin of focus since there is at least a space of one third region between the plurality of third regions.
According to the method of the third aspect, the application of the present invention for the formation of slim wires is effective for fine patterning and a wide margin of focus.
An object of the present invention is to provide a method of patterning a resist that allows further fine patterning of semiconductor integrated circuits.
These and other objects, features, aspects and advantages of the present invention will become more apparent from the following detailed description of the present invention when taken in conjunction with the accompanying drawings.